"Conditional Bridging and Extended Boosting: A Novel Low-Power Hybrid Flip-Flop Design for Near-Threshold Voltage CMOS Systems"
Keywords:
Low power, circuits, flip flops, CMOS, PVT, digital, circuits, performance, delay, robustness.Abstract
The recent upsurge in demand for Electronic devices with ultra-low power consumption requires the synthesis of digital circuits with high energy efficiency for near-threshold voltage (NTV) domains. These are sub-systems indispensable to digital systems because they involve flip-flops that determine the general reliability of power consumption and performance. For the first time, this paper proposes an improved flip-flop structure using conditional boosting to achieve high performance with less power consumption for NTV applications.
References
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. Alioto, M., & Palumbo, G. (2008). "Power-Efficient Flip-Flop Design: Techniques and Applications." IEEE Journal of Solid-State Circuits, 43(5), 1109-1119.
