A Machine Learning-Driven Placement Optimization Framework for VLSI  Physical Design

Hameed Ul Hassan Mohammed

A Machine Learning-Driven Placement Optimization Framework for VLSI Physical Design

Authors

Hameed Ul Hassan Mohammed

Keywords:

Machine Learning, VLSI, NeuroPlace, Physical Design, Optimization, Placement.

Abstract

The physical design phase of VLSI circuits plays a pivotal role in determining the final chipperformance, power efficiency, and manufacturability. Traditional placement algorithms, thoughwidely adopted, often suffer from scalability

References

. Kahng, A. B., et al. "RePlAce: Advancing solution quality and runtime for global placement." IEEE TCAD, 2020.

. Liu, B., et al. "DreamPlace: Deep learning toolkit-enabled GPU acceleration for modern VLSI placement." DAC, 2020.

. Mirhoseini, A., et al. "A graph placement methodology for fast chip design." Nature, 594, 2022.

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Published

2023-04-20

How to Cite

Hameed Ul Hassan Mohammed. (2023). A Machine Learning-Driven Placement Optimization Framework for VLSI Physical Design . Journal of Computational Analysis and Applications (JoCAAA), 31(4), 1576–1589. Retrieved from https://eudoxuspress.com/index.php/pub/article/view/3480