Optimized VLSI-Based Median Filter Design Using Data Comparator Logic for Real-Time Noise Reduction in Image Processing

Authors

  • O. Saritha, L. Ramesh, A. Venu Gopal

Keywords:

Comparator, Median Filter, Data Comparator, LUT, Multiplexer, VIVADO, Noise Reduction, Real-Time Image Processing.

Abstract

Filters are essential for eliminating many kinds of noise from pictures, including Gaussian, random,and salt-and-pepper noises. Thus, in real-time applications, the hardware implementation of filters designed for Very Large-Scale Integration (VLSI) becomes crucial. However, issues with excessive look-up-table (LUT) usage, route delays, and power consumption plague conventional hardware based filters.

References

Nikitha, Mylaram, and Divya Gampala. "Implementation of Hybrid Median Filtering using Modified Data Comparator." 2022 6th International Conference on Electronics, Communication and Aerospace Technology. IEEE, 2022.

Sanki, Pradyut Kumar, et al. "VLSI Implementation of a Real-time Modified Decision-based Algorithm for Impulse Noise Removal." 2022 IEEE International IOT, Electronics and Mechatronics Conference (IEMTRONICS). IEEE, 2022.

Bevara, Vasudeva, Bevara Srinu, and Pradyut Kumar Sanki. "VLSI Architecture of Decision Based Adaptive Denoising Filter for Removing Salt & Pepper Noise." ECS Transactions 107.1 (2022): 18423.

Downloads

Published

2023-01-20

How to Cite

O. Saritha, L. Ramesh, A. Venu Gopal. (2023). Optimized VLSI-Based Median Filter Design Using Data Comparator Logic for Real-Time Noise Reduction in Image Processing . Journal of Computational Analysis and Applications (JoCAAA), 31(1), 238–247. Retrieved from https://eudoxuspress.com/index.php/pub/article/view/2045

Issue

Section

Articles