DESIGN AND IMPLEMENTATION OF AUTOMATIC WASHING  MACHINE USING VERILOG HDL

Dr.A.RANGANAYAKULU , Dr.P.PRASANNA MURALI KRISHNA , PASUPULETI DURGA, OBUL REDDY PAVANI , THONTLA MALLESWARI , PINNAMSETTY NAGALEELA

DESIGN AND IMPLEMENTATION OF AUTOMATIC WASHING MACHINE USING VERILOG HDL

Authors

Dr.A.RANGANAYAKULU , Dr.P.PRASANNA MURALI KRISHNA , PASUPULETI DURGA, OBUL REDDY PAVANI , THONTLA MALLESWARI , PINNAMSETTY NAGALEELA

Keywords:

Abstract

This paper presents the design of a washing machine controller implemented using a finite state machine(FSM). The controller is responsible for managing the various stages of a washing cycle, including soak, wash, rinse,and spin. The system begins when a coin is deposited

References

"Verilog HDL" by Samir Palnitkar

"Digital Design and Computer Architecture" by David Harris and Sarah Harris

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Published

2024-12-11

How to Cite

Dr.A.RANGANAYAKULU , Dr.P.PRASANNA MURALI KRISHNA , PASUPULETI DURGA, OBUL REDDY PAVANI , THONTLA MALLESWARI , PINNAMSETTY NAGALEELA. (2024). DESIGN AND IMPLEMENTATION OF AUTOMATIC WASHING MACHINE USING VERILOG HDL . Journal of Computational Analysis and Applications (JoCAAA), 33(08), 3868–3874. Retrieved from https://eudoxuspress.com/index.php/pub/article/view/2634