DESIGN AND IMPLEMENTATION OF DUAL-PORT RAM WITH  MULTI-CLOCK SUPPORT IN VERILOG

Mr.M.RAMANA REDDY, Mr.B.AJANTHA REDDY , AVUKU SUBRAMANYAM , KOTLA SHIVA REDDY, DUDDELA RAMAKRISHNA REDDY, YELAM VENKATA SAI VAMSI

DESIGN AND IMPLEMENTATION OF DUAL-PORT RAM WITH MULTI-CLOCK SUPPORT IN VERILOG

Authors

Mr.M.RAMANA REDDY, Mr.B.AJANTHA REDDY , AVUKU SUBRAMANYAM , KOTLA SHIVA REDDY, DUDDELA RAMAKRISHNA REDDY, YELAM VENKATA SAI VAMSI

Keywords:

Abstract

This paper discusses the design and implementation of a Dual-Port RAM (DPRAM) with multi-clocksupport using Verilog. Dual-Port RAM allows simultaneous read and write operations on two independentports, which can be useful for high-performance applications such as data buffering, communicationsystems, and video processing.

References

Hwang, K. & Kim, H. (2003). Design and Implementation of Dual-Port RAM for FPGA Applications. IEEE Transactions on VLSI Systems, 11(5), 924-927. This paper discusses the design of dual-port RAM and its implementation in FPGA systems, focusing on how dual port memory can be used to speed up data access in FPGA-based architectures.

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Published

2024-12-18

How to Cite

Mr.M.RAMANA REDDY, Mr.B.AJANTHA REDDY , AVUKU SUBRAMANYAM , KOTLA SHIVA REDDY, DUDDELA RAMAKRISHNA REDDY, YELAM VENKATA SAI VAMSI. (2024). DESIGN AND IMPLEMENTATION OF DUAL-PORT RAM WITH MULTI-CLOCK SUPPORT IN VERILOG . Journal of Computational Analysis and Applications (JoCAAA), 33(08), 3835–3842. Retrieved from https://eudoxuspress.com/index.php/pub/article/view/2629