Pawan Kumar Singh. Scaling Gate-All-Around (GAA) Transistor Architectures for Sub-2nm AI Accelerators Using Atomically Thin 2D Materials . Journal of Computational Analysis and Applications (JoCAAA) [Internet]. 2024 Nov. 20 [cited 2026 Oct. 15];33(08):9338-50. Available from: https://eudoxuspress.com/index.php/pub/article/view/5713