RANA S MAHAJAN ,VINOD S MAHAJAN, SACHIN B BORSE. “Efficient Low-Power Arithmetic Unit Design Using Booth Multiplication Technique” . Journal of Computational Analysis and Applications (JoCAAA), [S. l.], v. 31, n. 2, p. 790–802, 2023. Disponível em: https://eudoxuspress.com/index.php/pub/article/view/5395. Acesso em: 11 sep. 2026.