MR.B.AJANTHA REDDY , DR.A.RANGANAYAKULU , ATCHUTA RAKESH, DUGGI RAMI REDDY, SREERAMULA SURESH, CHALLA UDAY KIRAN. DESIGN AND IMPLEMENTATION OF ASYNCHRONOUS FIFO WITH DUAL CLOCK DOMAIN IN VERILOG. Journal of Computational Analysis and Applications (JoCAAA), [S. l.], v. 33, n. 08, p. 3828–3834, 2024. Disponível em: https://eudoxuspress.com/index.php/pub/article/view/2628. Acesso em: 9 sep. 2026.