Self-Healing Router Architecture for Fault-Tolerant Communication in Network-on-Chip Systems

Authors

  • D. Satheesh, M. Suneel, Dr I. V. Prakash

Keywords:

Network-on-Chip (NoC), Fault-Tolerant Routing, Self-Healing Routers, Autonomous Error Recovery, Port Buffer Fault Mitigation, Three-Bit Routing Mechanism

Abstract

Communication reliability is crucial for Network-on-Chip (NoC) systems that support many cores or Processing Elements (PEs). As connectors, routers are essential, and a malfunctioning router can seriously impair NoC functionality, resulting in misunderstandings and system failure. In order to solve router and port buffer issues on its own, this study presents a novel self-healing technique.

References

N. L. Venkataraman, R. Kumar, and P. M. Shakeel, “Ant lion optimized bufferless routing in the design of low power application specific network on chip,” Circuits Syst. Signal Process., vol. 39, no. 2, pp. 961–976, 2020.

M. S. Sayed, A. Shalaby, M. El-Sayed, and V. Goulart, “Flexible router architecture for network-on-chip,” Comput. Math. Appl., vol. 64, no. 5, pp. 1301–1310, 2012.

S. Majumder, J. F. D. Nielsen, A. La Cour-Harbo, H. Schiøler, and T. Bak, “A real-time on-chip network architecture for mixed criticality aerospace systems,” Aeronaut. J., vol. 123, no. 1269, pp. 1788–1806, 2019.

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Published

2023-01-10

How to Cite

D. Satheesh, M. Suneel, Dr I. V. Prakash. (2023). Self-Healing Router Architecture for Fault-Tolerant Communication in Network-on-Chip Systems. Journal of Computational Analysis and Applications (JoCAAA), 31(1), 208–218. Retrieved from https://eudoxuspress.com/index.php/pub/article/view/2042

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